Asian Hardware Oriented Security and Trust Symposium (AsianHOST)

Featured Speakers / Panelists

INVITED SPEAKER Makoto Ikeda U. of Tokyo	INVITED SPEAKER Marilyn C. Wolf Georgia Tech	INVITED SPEAKER Sandip Kundu NSF and UM Amherst	INVITED SPEAKER Naehyuck Chang KAIST
INVITED SPEAKER Ahmad-Reza Sadeghi TU Darmstadt

Hardware has long been viewed as a trusted party supporting the whole computer system and is often treated as an abstract layer running instructions passed through the software layer. Historically, cybersecurity community believed that the integrated circuit (IC) supply chain is well protected. However, the IC supply chain, which is now spread around the globe, has become more vulnerable to attacks than before. The heavy reliance on third-party resources/services breeds security concerns and invalidates the illusion that attackers cannot easily access the isolated IC supply chain. Formal methods have been proven to be effective in security verification on hardware code. Trustworthy hardware is also under development for the construction of the root-of-trust. The intrinsic properties of existing and emerging devices, MOSFET, memristor, spintronics, etc. are leveraged for security primitives and applications. Another trend in the hardware security area is the development of security enhanced hardware infrastructure for system level protection. The goal is to provide a fully operational software and hardware platform that ensures secure design, manufacturing, and deployment of modern computer systems.
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AsianHOST 2018 Accepted Papers:

• Shalabh Jain, Qian Wang, Md Tanvir Arafin and Jorge Guajardo Merchan. Probing Attacks on Key Agreement for Automotive Controller Area Networks
• Love Sah, Sheikh Ariful Islam and Srinivas Katkoori. An Efficient Hardware-Oriented Runtime Approach for Stack-based Software Buffer Overflow Attacks
• Horácio França, Charles Prado, Vinay Patil and Sandip Kundu. Defeating Strong PUF Modeling Attack via Adverse Selection of Challenge-Response Pairs
• Mihailo Isakov, Lake Bu, Hai Cheng and Michel Kinsy. Preventing Neural Network Model Exfiltration in Machine Learning Hardware Accelerators
• Jiliang Zhang. Machine Learning Attacks on VOS-based Lightweight Authentication
• Farhath Zareen and Robert Karam. Detecting RTL Trojans using Artificial Immune Systems and High Level Behavior Classification
• Rongjun Tan, Yuan Gao, Haixia He and Yuan Cao. Secrecy Performance of Cognitive Radio Sensor Networks with an Energy-Harvesting based Eavesdropper and Imperfect CSI
• Wenjie Li, Jing Ye, Xiaowei Li, Huawei Li and Yu Hu. Bias PUF based Secure Scan Chain Design
• Xiaofei Dong, Fan Zhang, Samiya Queshi, Yiran Zhang, Ziyuan Liang and Feng Gao. A Wavelet-based Power Analysis Attack against Random Delay Countermeasure
• Asha K A, Abhishek Patyal and Hung-Ming Chen. Generation of PUF-keys on FPGAs by K-means Frequency Clustering
• Zhonghao Liao and Yong Guan. The Cell Dependency Analysis on Learning SRAM Power-Up States
• Peng Gu, Dylan Stow, Prashansa Mukim, Shuangchen Li and Yuan Xie. Cost-efficient 3D Integration to Hinder Reverse Engineering During and After Manufacturing
• Qian Wang, Yiming Qian, Zhaojun Lu, Gang Qu and Yasser Shoukry. A Delay based Plug-in-Monitor for Intrusion Detection in Controller Area Network
• Qihang Shi, Huanyu Wang, Navid Asadizanjani, Mark Tehranipoor and Domenic Forte. A Comprehensive Analysis on Vulnerability of Active Shields to Tilted Microprobing Attacks
• Mehmet Alp Sarkisla and Salih Ergun. Ring Oscillator Based Random Number Generator Using Wake-up and Shut-down Uncertainties
• Prabuddha Chakraborty, Jonathan Cruz and Swarup Bhunia. SAIL: Machine Learning Guided Structural Analysis Attack on Hardware Obfuscation
• Sheikh Ariful Islam, Srinivas Katkoori and Love Kumar Sah. Empirical Word-Level Analysis of Arithmetic Module Architectures for Hardware Trojan Susceptibility
• Muhammad Abdul Wahab, Pascal Cotret, Mounir Nasr Allah, Guillaume Hiet, Vianney Lapotre, Guy Gogniat and Arnab Kumar Biswas. A novel lightweight hardware-assisted static instrumentation approach for ARM SoC using debug components
• Bo Ning and Qiang Liu. Modeling and Efficiency Analysis of Clock Glitch Fault Injection Attack