8:00AM ~ 8:40AM |
Sign-up and breakfast |
8:40AM ~ 9:00AM |
Opening (Dr. Huazhong Yang from Tsinghua and Dr. Yier Jin from UCF) |
9:00AM ~ 9:15AM |
Welcome: Qing Pan, National Natural Science Foundation of China (NSFC) Officer
Session Chair: Dr. Huazhong Yang (Tsinghua University)
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9:15AM~9:30PM |
Visionary Talk: Dr. Xiaoxiao Wang (Beihang University) (bio)
Session Chair: Wujie Wen (Florida International University, USA)
Title: The Technique of Security
Xiaoxiao Wang received her B.S. and M.S. degrees in Electrical Engineering from Beihang University, Beijing, China in 2005 and 2007, respectively, and the Ph.D. degree in Electrical and Computer Engineering from University of Connecticut, Storrs, CT. She joined the DFT team of Microcontroller Solutions Group, Freescale Semiconductor, Austin, TX in 2010. She joined the faculty of Beihang University since 2014. Her research interests include On-Chip Measurement Architecture Design, Reliability, and DFT.
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9:30AM ~ 10:15AM |
Keynote: Dr. Mark Tehranipoor (University of Florida, USA) (Bio)
Session Chair: Gang Qu (University of Maryland)
Title: Hardware Security: Past, Present, and the Future
Mark Tehranipoor is currently the Intel Charles E. Young Preeminence Endowed Professor in Cybersecurity at the University of Florida. His current research projects include: hardware security and trust, supply chain security, VLSI design, test and reliability. Dr. Tehranipoor has published over 300 journal articles and refereed conference papers and has given more than 150 invited talks and keynote addresses. He has published six books and eleven book chapters. He is a recipient of several best paper awards as well as the 2008 IEEE Computer Society (CS) Meritorious Service Award, the 2012 IEEE CS Outstanding Contribution, the 2009 NSF CAREER Award, and the 2014 MURI award. He serves on the program committee of more than a dozen of leading conferences and workshops. He served as Program Chair of the 2007 IEEE Defect-Based Testing (DBT) workshop, Program Chair of the 2008 IEEE Defect and Data Driven Testing (D3T) workshop, Co-program Chair of the 2008 International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), General Chair for D3T-2009 and DFTS-2009, and Vice-general Chair for NATW-2011. He co-founded the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST) and served as HOST-2008 and HOST-2009 General Chair. He is currently serving as an Associate Editor for JETTA, JOLPE, IEEE TVLSI and ACM TODAES. Prior to joining UF, Dr. Tehranipoor served as the founding director for CHASE and CSI centers at the University of Connecticut. He is currently serving as co-director for Florida Institute for Cybersecurity Research (FICS). Dr. Tehranipoor is a Senior Member of the IEEE, a Golden Core Member of IEEE, and Member of ACM and ACM SIGDA.
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10:15AM ~ 10:30AM |
COFFEE BREAK
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10:30AM ~ 11:30PM |
Panel: Research Collaboration Opportunities in Hardware Security
Moderator: Gang Qu (University of Maryland)
Panelists: Mark Tehranipoor, Qingxu Deng, Xiaowei Li, Huazhong Yang, Xiaoxiao Wang, Government Officers
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11:30AM ~ 12:30AM |
Session I (Session Chair: Weisheng Zhao, Beihang University, China) |
11:30AM ~ 12:00PM |
Talk One: Dr. Yier Jin (University of Central Florida, USA) (Bio)
Title: Hardware's Active Role in Cybersecurity
Yier Jin is currently an assistant professor in the ECE Department at the University of Central Florida. He received his PhD degree in Electrical Engineering in 2012 from Yale University. His research focuses on the areas of trusted embedded systems, trusted hardware intellectual property (IP) cores and hardware-software co-protection on computer systems. He is also interested in the security analysis on Internet of Things (IoT) devices with particular emphasis on information integrity and privacy protection in the IoT era. He is the Department of Energy (DoE) Early Career Award recipient in 2016. He is the best paper award recipient of the 52nd Design Automation Conference in 2015 and the 21st Asia and South Pacific Design Automation Conference in 2016.
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12:00PM ~ 12:30PM |
Talk Two: Dr. Gang Qu (University of Maryland, USA) (Bio)
Title: 20 Years of Research on Hardware Security and Trust
Dr. Gang Qu studied mathematics in the University of Science and Technology of China and the University of Oklahom before obtaining his Ph.D. in computer science from the University of California at Los Angeles. He is currently a professor in the Department of Electrical and Computer Engineering and Institute for Systems Research, University of Maryland at College Park, where he is the director of Maryland Embedded Systems and Hardware Security (MeshSec) Lab and the Wireless Sensors Laboratory. His primary research interests are in the area of embedded systems and VLSI CAD with focus on low power system design and hardware related security and trust. He studies optimization and combinatorial problems and applies his theoretical discovery to applications in VLSI CAD, wireless sensor network, bioinformatics, and cybersecurity. His book "VLSI Intellectual Property Protection: Theory and Practice" is the first in hardware security and he is also the author of a popular MOOC course on hardware security.
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12:30PM ~ 2:00PM |
LUNCH
Lunch Talk: Government Officer
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2:00PM ~ 3:20PM |
Session II (Session Chair: Yongpan Liu, Tsinghua University, China) |
2:00PM ~ 2:20PM |
Talk Three: Xiaoming Chen (Tsinghua University, China) (Bio)
Title: Hardware Security Verification by Statistical Learning Theories
Dr. Xiaoming Chen received the BS and PhD degrees from the department of Electronic Engineering, Tsinghua University in 2009 and 2014, respectively. Since 2014, he has been a post-doc research scholar at Electrical and Computer Engineering Department, Carnegie Mellon University. His research interests include CAD algorithms for hardware security, IoT applications, circuit simulation, and reliability-aware circuit design. He has authored and co-authored more than 30 papers in these research areas. He received the 2015 EDAA outstanding dissertation award.
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2:20PM ~ 2:40PM |
Talk Four: Huawei Li (Chinese Academy of Science) (bio)
Title: Timing Channel Protection for Shared Memory Controllers
Huawei Li received the Ph.D. degree in computer science from the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) in 2001. She has been a Professor at ICT, CAS since 2008. Her research interests include testing of VLSI/SOC circuits, design verification, hardware security, design for reliability, and error tolerant computing. She has published over 160 technical papers in these areas. Prof. Li currently serves as an Associate Editor of the IEEE Transaction on VLSI Systems, and the Chair of the China Computer Federation Technical Committee on Fault-Tolerant Computing. She has served on the technical program committees for several IEEE conferences including DATE, ITC, ASP-DAC, ATS, ETS, etc.
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2:40PM ~ 3:00PM |
Talk Five: Shimeng Yu (Arizona State University, USA) (bio)
Title: Exploring Variability of Emerging Nano-Devices for Hardware Security: A Case Study of RRAM based PUF
Shimeng Yu received the B.S. degree in microelectronics from Peking University, Beijing, China in 2009, and the M.S. degree and Ph.D. degree in electrical engineering from Stanford University, CA, USA in 2011, and in 2013, respectively. He is currently an assistant professor of electrical engineering at Arizona State University. His current research interests are emerging nano-devices and circuits with a focus on the resistive memories for different applications including monolithic 3D integration, brain-inspired neuromorphic computing, hardware security, radiation-hard electronics, etc. Among his honors, he was a recipient of the Stanford Graduate Fellowship from 2009 to 2012, the IEEE Electron Devices Society Masters Student Fellowship in 2010, and the IEEE Electron Devices Society PhD Student Fellowship in 2012, and the DOD-DTRA Young Investigator Award in 2015, and the NSF CAREER Award in 2016.
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3:00PM ~ 3:20PM |
Talk Six: Jing Ye (Chinese Academy of Science) (bio)
Title: Polymorphic PUF and Authentication: Exploiting Reconfigurability of CPU+FPGA SoC to Resist Modeling Attack and Improve Reliability
Jing Ye received the B.S. degree in electronics engineering and computer science from Peking University in 2008. He received the Ph.D. degree in Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS) in 2014. He is currently an assistant professor at the State Key Laboratory of Computer Architecture, ICT, CAS. His research interests include VLSI testing and diagnosis, physical unclonable function and hardware security.
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3:20PM ~ 4:00PM |
COFFEE BREAK and SOCIAL EVENTS |
4:00PM ~ 4:15PM |
Concluding Remarks (Dr. Yier Jin) |